DS3232SN#T&R【PDF 7/19 页】IC RTC W/TCXO 20-SOIC

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Aging Offset Register

The aging offset register takes a user-provided value to

add to or subtract from the oscillator capacitor array.

The data is encoded in two’s complement, with bit 7

representing the sign bit. One LSB represents the

smallest capacitor to be switched in or out of the

capacitance array at the crystal pins. The aging offset

the capacitance value that the device calculates for

each temperature compensation. The offset register is

added to the capacitance array during a normal tem-

perature conversion, if the temperature changes from

the previous conversion, or during a manual user con-

version (setting the CONV bit). To see the effects of the

aging register on the 32kHz output frequency immedi-

ately, a manual conversion should be started after each

aging offset register change.

Positive aging values add capacitance to the array,

slowing the oscillator frequency. Negative values

remove capacitance from the array, increasing the

oscillator frequency.

The change in ppm per LSB is different at different

temperatures. The frequency vs. temperature curve is

shifted by the values used in this register. At +25°C,

one LSB typically provides about 0.1ppm change in

frequency.

Use of the aging register is not needed to achieve the

accuracy as defined in the EC tables, but could be

used to help compensate for aging at a given tempera-

ture. See the

Typical Operating Characteristics section

for a graph showing the effect of the register on accu-

racy over temperature.

Temperature Registers (11h–12h)

Temperature is represented as a 10-bit code with a res-

olution of 0.25°C and is accessible at location 11h and

12h. The temperature is encoded in two’s complement

format, with bit 7 in the MSB representing the sign bit.

The upper 8 bits, the integer portion, are at location 11h

and the lower 2 bits, the fractional portion, are in the

upper nibble at location 12h. For example,

00011001 01b = +25.25°C. Upon power reset, the reg-

isters are set to a default temperature of 0°C and the

controller starts a temperature conversion.

The temperature is read on initial application of VCC or

I2C access on VBAT and once every 64 seconds after-

wards. The temperature registers are updated after

each user-initiated conversion and on every 64-second

conversion. The temperature registers are read-only.

Extremely Accurate I2C RTC with

Integrated Crystal and SRAM

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

NAME:

SIGN

DATA

POR*:

000

Aging Offset (10h)

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

NAME:

SIGN

DATA

POR*:

000

Temperature Register (Upper Byte) (11h)

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

NAME:

DATA

POR*:

000

Temperature Register (Lower Byte) (12h)

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

NAME:

POR*:

XXXXXXXX

SRAM (14h–FFh)

POR is defined as the first application of power to the device, either VBAT or VCC.

DS3232

Maxim Integrated

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